Digital Circuit Design: Using Machine Learning Algorithms to Create Gate Level Circuits

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In Folder: Digital Circuit Design using Machine Learning

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Digital Circuit Design: Using Machine Learning Algorithms to Create Gate Level Circuits

Senior Design Showcase project, Wentworth Institute of Technology, College of Engineering and Computer Science, Department of Electrical and Computer Engineering, 2020

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title: Digital Circuit Design: Using Machine Learning Algorithms to Create Gate Level Circuits

creator: Stanyslav Borsh, Daniel Smith de Paz, William Owens

subject: Digital circuit design, artificial intelligence, circuit verification

description: Using machine learning to design gate-level circuits, the team aims to compare the competence of two ML algorithms at this task: Q-learning, and Genetic Evolution. The algorithms will be compared on their effectiveness to design circuits and their overall efficiency. The output produced by each of these will be fed into a circuit verification system that produce various metrics to help guide each algorithm to learn and synthesize. The algorithms were tested on several circuits, with the goal to scale up the circuit complexity over time as more information is collected.

publisher: The Douglas D. Schumann Library and Learning Commons, Wentworth Institute of Technology

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date: 2020

type: Presentation

format: video recording

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language: eng

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rights: https://rightsstatements.org/vocab/InC/1.0/

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